Field of the Invention
This invention relates to the field of data processing systems. More particularly, this invention relates to data processing systems for performing data processing operations specified by arithmetic instructions and logical instructions.
Description of the Prior Art
It is known to provide data processing systems including processing circuitry controlled by an instruction decoder which decodes a stream of program instructions. The processing circuitry can perform data processing operations upon data values held within registers of a register bank. The data processing operations performed can include arithmetic operations (such as addition, subtraction, multiplication, etc) and logical operations (such as AND, OR, XOR, etc). It is known that data values to be manipulated by arithmetic and logical instructions can have different bit lengths. For example, integer values to be manipulated may be 32-bit integers or 64-bit integers. If 32-bit integer values are subject to a logical or arithmetic operation, then at least the least significant portion of the result will have the same value as if those 32-bit input operands had been treated as 64-bit input operands and manipulated with a 64-bit instruction. For this reason, known instruction sets do not expend instruction encoding bit space within the instructions in providing a way of distinguishing between 32-bit and 64-bit logical and arithmetic instructions.